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(a) To obtain the marginal density of X, we fix x and integrate with respect to y from 0 to x as indicated by the vertical strip in Fig. 2-17. The result is

f1(x) for 0 x 1. For all other values of x, f1 (x)

Halstead wanted to estimate how much time (e ort) was needed to implement this algorithm. He used a notion of elementary mental discriminations (emd). E V=L The units are elementary mental discriminations (emd). Halstead s e ort is not monotonic in other words, there are programs such that if you add statements, the calculated e ort decreases.

Fig. 8-46

4x 3

9.1 INTRODUCTION This chapter will concentrate on the steady-state response of circuits driven by sinusoidal sources. The response will also be sinusoidal. For a linear circuit, the assumption of a sinusoidal source represents no real restriction, since a source that can be described by a periodic function can be replaced by an equivalent combination (Fourier series) of sinusoids. This matter will be treated in 17.

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(b) Similarly, the marginal density of Y is obtained by fixing y and integrating with respect to x from x as indicated by the horizontal strip in Fig. 2-17. The result is, for 0 y 1,

f2 ( y) For all other values of y, f2 ( y) 0.

The voltage-current relationships for the single elements R, L, and C were examined in 2 and summarized in Table 2-1. In this chapter, the functions of v and i will be sines or cosines with the argument !t. ! is the angular frequency and has the unit rad/s. Also, ! 2 f , where f is the frequency with unit cycle/s, or more commonly hertz (Hz). Consider an inductance L with i I cos !t 458 A [see Fig. 9-1(a)]. The voltage is vL L di !LI sin !t 458 !LI cos !t 1358 dt V

4y(1

Fig. 9-1

y 2)

Encoding n di erent items would require at a minimum log2 n bits for each item. To encode a sequence of N, such items would require N log2 n.

(c) The conditional density function of X is, for 0 f1(x u y) f (x, y) f2 (y)

A comparison of vL and i shows that the current lags the voltage by 908 or =2 rad. The functions are sketched in Fig. 9-1(b). Note that the current function i is to the right of v, and since the horizontal scale is !t, events displaced to the right occur later in time. This illustrates that i lags v. The horizontal scale is in radians, but note that it is also marked in degrees ( 1358; 1808, etc.). This is a case of mixed units just as with !t 458. It is not mathematically correct but is the accepted practice in circuit analysis. The vertical scale indicates two di erent quantities, that is, v and i, so there should be two scales rather than one. While examining this sketch, it is a good time to point out that a sinusoid is completely de ned when its magnitude V or I , frequency (! or f ), and phase (458 or 1358) are speci ed. In Table 9-1 the responses of the three basic circuit elements are shown for applied current i I cos !t and voltage v V cos !t. If sketches are made of these responses, they will show that for a resistance R, v and i are in phase. For an inductance L, i lags v by 908 or =2 rad. And for a capacitance C, i leads v by 908 or =2 rad.

The conditional density function is not defined when f2( y) (d) The conditional density function of Y is, for 0 f2( y u x) f (x, y) f1(x) x e 1,

EXAMPLE 9.1 The RL series circuit shown in Fig. 9-2 has a current i I sin !t. Obtain the voltage v across the two circuit elements and sketch v and i. vR RI sin !t di !LI sin !t 908 dt v vR vL RI sin !t !LI sin !t 908 vL L

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